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1. Field of the Invention
The present invention generally relates to space conservation on an integrated circuit board and, more particularly, to using SDRAM to minimize circuitry area and thereby conserve space on an integrated circuit board.
2. Discussion of Background
A common goal of manufacturers of integrated circuits is to make integrated circuits as small as possible. Memory cell buffers account for a substantial portion of the real estate on a circuit board. Accordingly, manufacturers desire high density memory cell buffers. Typically static random access memory (static RAM) is used for these cell buffers. An array of static RAM is easy to design because of the way static RAM works. Static RAM is easy to arrange on the circuit board, and reading and writing with static RAM is easy.
Unfortunately, static RAM is not very dense in comparison to other types of memories, such as synchronous dynamic random access memory (SDRAM). SDRAM is typically between 4 and 16 times the density of static RAM.
However, performing a simple trade of static RAM for SDRAM is not feasible because of the way SDRAM operates. Static RAM and SDRAM read and write data in fundamentally different manners. For example, with SDRAM, a device cannot just determine that it wants particular data xe2x80x9cnowxe2x80x9d from SDRAM. The device must send a request to SDRAM before hand, and the SDRAM must be prepared give the data. Also, when a device writes data to an SDRAM bank, the device must wait awhile before writing more data to the SDRAM bank. SDRAM cannot be written to continuously, unlike static RAM. Further, making a one-for-one trade of static RAM for SDRAM is not feasible because a single SDRAM array would not be fast enough. In comparison to static RAM, one cannot get data out of SDRAM quick enough without making noise.
One attempt to utilize SDRAM has been to make the buses on which the SDRAM communicates wider. More SDRAM can then be used in communication with the bus so that SDRAM can replace what was before static RAM. Attempts have been made to use 64 bit buses, which are wider than normal. However, wider buses are generally a problem. For starters, wider buses take up a lot of real estate on the circuit board. The wide bus and additional SDRAM defeat the purpose of having a higher density circuit board, which is the motivating goal in the first place.
It has been recognized that what is needed is a memory arrangement that operates at a desired bandwidth and that does not have an oversized bus. Broadly speaking, the present invention fills this need by providing a method and apparatus for transmitting data using synchronous dynamic random access memory (SDRAM) on a normal sized memory bus. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a method is provided for transmitting data using SDRAM. The method comprises writing data using a first set of SDRAM banks; writing data using a second set of SDRAM banks, wherein the first set of SDRAM banks and the second set of SDRAM banks write interleaved; reading data using a third set of SDRAM banks; and reading data using a fourth set of SDRAM banks, wherein the fourth set of SDRAM banks and the third set of SDRAM banks read interleaved.
In another embodiment, an apparatus for transmitting data using synchronous dynamic random access memory (SDRAM), the apparatus comprises a first even addressed SDRAM bank; a second even addressed SDRAM bank, wherein the first even addressed SDRAM bank and the second even addressed SDRAM bank are configured to write in parallel; a first odd addressed SDRAM bank, wherein the first add addressed SDRAM bank and the first even addressed SDRAM bank are configured to write interleaved; and a second odd addressed SDRAM bank, wherein the second odd addressed SDRAM bank and the first odd addressed SDRAM bank are configured to write in parallel, and wherein the second odd addressed SDRAM bank and the second even addressed SDRAM bank are configured to write interleaved.
The invention encompasses other embodiments of a method, an apparatus, and a computer-readable medium, which are configured as set forth above and with other features and alternatives.